80A06 PatternSync Trigger Module

TDS/CSA8000系列取样示波器码型同步触发模块
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Features & Benefits

  • Enables 80SJNB – the Advanced Jitter, Noise, and BER Analysis Software
  • Provides Trigger on Repetitive Patterns from 2 to 223 Bits Long
  • Provides Buffered Clock Output for Input to a Phase Reference Module or other Devices
  • Accepts Clock from Clock Recovery Circuits (CR) in the 80A05 and 80A07 Electrical Clock Recovery Modules, and in the Optical Modules
  • Optional SlotSaver Adapter Provides Power and Control of the PatternSync Trigger Modules, External to the Mainframe, Saving Space for Additional Channels

Applications

  • When Used in Combination with 80SJNB: Characterizing Jitter, Noise, and BER Performance of High Speed Serial Designs from 1 Gb/s to 60 Gb/s Data Rates
  • Design Validation and Testing of Next Generation High-speed Serial Data Computer and Communications Components and Systems
  • When Used in Combination with 80SJNB: Jitter, Noise, and BER Analysis of Multi-gigabit Standards such as Fibre Channel, OIF CEI, XFP, UXPi, SATA, PCI, Physical Layer, XAUI, Gigabit Ethernet, Rapid I/O, InfiniBand, and Other Electrical or Optical Circuits
  • Enables Capture of Bits in a Repetitive Pattern for Bit Analysis When Only a Clock is Available for Triggering
  • Enables FrameScan™ of Repetitive Patterns When Only aClock Signal is Available for Triggering

*1 Also compatible with TDS/CSA8200, TDS/CSA8000B and TDS/CSA8000 sampling oscilloscopes.

PatternSync Trigger Module

80A06 PatternSync Trigger module is required for the DSA8200 Series when using 80SJNB advanced Jitter, Noise, and BER Analysis software package. When this module is used with the 82A04 Phase Reference module, the jitter floor is ≤200 fsRMS

The PatternSync Trigger Module is programmable to pattern lengths of up to 223 bits and accepts a user supplied clock signal from 150 MHz to 12.75 GHz. The DSA8200 UI/PI for the 80A06 module offers pattern lengths from 2 to 223 bits and programs the module to within it's hardware range (a pre-scaler followed by a counter with minimum count of 30) for the least-common-multiple count.

Features & Benefits

  • Enables 80SJNB – the Advanced Jitter, Noise, and BER Analysis Software
  • Provides Trigger on Repetitive Patterns from 2 to 223 Bits Long
  • Provides Buffered Clock Output for Input to a Phase Reference Module or other Devices
  • Accepts Clock from Clock Recovery Circuits (CR) in the 80A05 and 80A07 Electrical Clock Recovery Modules, and in the Optical Modules
  • Optional SlotSaver Adapter Provides Power and Control of the PatternSync Trigger Modules, External to the Mainframe, Saving Space for Additional Channels

Applications

  • When Used in Combination with 80SJNB: Characterizing Jitter, Noise, and BER Performance of High Speed Serial Designs from 1 Gb/s to 60 Gb/s Data Rates
  • Design Validation and Testing of Next Generation High-speed Serial Data Computer and Communications Components and Systems
  • When Used in Combination with 80SJNB: Jitter, Noise, and BER Analysis of Multi-gigabit Standards such as Fibre Channel, OIF CEI, XFP, UXPi, SATA, PCI, Physical Layer, XAUI, Gigabit Ethernet, Rapid I/O, InfiniBand, and Other Electrical or Optical Circuits
  • Enables Capture of Bits in a Repetitive Pattern for Bit Analysis When Only a Clock is Available for Triggering
  • Enables FrameScan™ of Repetitive Patterns When Only aClock Signal is Available for Triggering

*1 Also compatible with TDS/CSA8200, TDS/CSA8000B and TDS/CSA8000 sampling oscilloscopes.

PatternSync Trigger Module

80A06 PatternSync Trigger module is required for the DSA8200 Series when using 80SJNB advanced Jitter, Noise, and BER Analysis software package. When this module is used with the 82A04 Phase Reference module, the jitter floor is ≤200 fsRMS

The PatternSync Trigger Module is programmable to pattern lengths of up to 223 bits and accepts a user supplied clock signal from 150 MHz to 12.75 GHz. The DSA8200 UI/PI for the 80A06 module offers pattern lengths from 2 to 223 bits and programs the module to within it's hardware range (a pre-scaler followed by a counter with minimum count of 30) for the least-common-multiple count.

Characteristics

Acquisition Modes - standard, triggered phase reference, and FrameScan™

Compatible mainframes - DSA8200, TDS/CSA8200, TDS/CSA8000B, and TDS/CSA8000

Mainframe resources required - one small (electrical) module slot, or TRIGGER PROBE POWER connector on the front panel of the oscilloscope (with available SlotSaver cable)

General Specifications

Input/Output connectors - Precision 18 GHz SMA female connector

Input and Output Impedance - 50 Ω

Absolute Maximum Input Voltage - 2.0 Vp-p

Maximum DC Offset - ±5.0 VDC

Input Electrical Return Loss -

>15 dB (50 MHz to 10 GHz)

>10 dB (10 GHz to 20 GHz)

Input/Output Coupling -

CLOCK IN: AC

CLOCK OUT: AC

TRIGGER OUT: DC

Supported clock rates -

Minimum: 150 MHz

Maximum: 12.5 GHz, 12.75 GHz (typical)

Prescaler ratios -

Input clock (as selected in the UI/PI)

150 MHz to 3.5 GHz: 4

3.5 GHz to 7 GHz: 8

7 GHz to 12.75 GHz: 16

Programmable pattern length -

Minimum: 2

Maximum: 223 (8,388,608)

Front panel output amplitudes -

CLOCK OUT output (50 Ω AC coupled)

150 MHz to 8.0 GHz: 500 mVp-p (typical)

8.0 GHz to 12.75 GHz: 250 mVp-p (typical)

TRIGGER OUT output (50 Ω DC coupled, ground referenced)

Output High Level: 0 V

Output Low Level: –550 mV (typical)

Front panel output rise and fall times -

CLOCK OUT:

TRIGGER OUT:

System jitter -

DSA8200, TDS/CSA8200, and TDS/CSA8000B with 80A06: RMS, 850 fs RMS (typical)

TDS/CSA8000 with 80A06: RMS, 1.0 psRMS (typical)

DSA8200 and TDS/CSA8200 with 80A06 and 82A04: ≤200 fsRMS (determined by the 82A04, see 82A04 data sheet for more details).

Minimum input sensitivity - 200 mVp-p

Environmental and Mechanical

Weightkglbs
Dimensionsmmin
Net0.40.6
Height25 1.0
Width793.1
Depth1355.3

Environmental conditions - Refer to the host instrument specification.

Electromagnetic - Refer to the host instrument specification.

Ordering Information

80A06

PatternSync Trigger Module

Includes: User manual, 2 each 12" SMA cables (174-1364-00)

Service Options

Opt. D1 - Calibration data reports.

Opt. R3. - Extend repair warranty to three years.

Accessories

Sampling Module Extender Cable (2 meter length) - Order 80N01.

SlotSaver Adapter Extender Cable - Brings power and control to the 80A06 when operated externally from the DSA mainframe, saving slot space (compatible with 80A06 and 80A02). Order 174-5230-00.




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Product(s) are manufactured in ISO registered facilities.

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Product(s) complies with IEEE Standard 488.1-1987, RS-232-C, and with Tektronix Standard Codes and Formats.

85W-18890-3

特征

承购 方式- 标准,被触发的阶段参考和FrameScan™

兼容 计算机主机- DSA8200、TDS/CSA8200、TDS/CSA8000B和TDS/CSA8000

计算机主机 资源要求- 一个小(电子)模块槽孔或者触发器探针 电源插口在示波器的面板(与可利用的SlotSaver 缆绳)

一般规格

输入-输出连接器 - 精确度18千兆赫SMA插座连接器

输入和输出阻抗 - 50 Ω

绝对最大输入电压- 2.0 v

被抵销的 最大值DC - ±5.0 VDC

输入电子逆程损失- >15 dB (50兆赫到10千兆赫)>10 dB (10千兆赫到20千兆赫)

输入-输出 联结- 时钟在: AC时钟: AC触发器: DC

支持的 时钟频率- 极小值: 150兆赫最大值: 12.5千兆赫, 12.75千兆赫 (典型)

Prescaler比率- 输入时钟(如被选择 在UI/PI)150兆赫到3.5千兆赫: 43.5千兆赫对7千兆赫: 87千兆赫 到12.75千兆赫: 16

可编程序的样式长度- 极小值: 2最大值: 223 (8,388,608)

面板产品 高度- 时钟输出了(被结合的50 Ω AC)150兆赫到 8.0千兆赫: 500 mV (典型)8.0千兆赫对12.75千兆赫: 250 mV (典型) 触发器输出了(被结合的50 Ω DC,参考的地面)产品高级: 0 V产品低级: - 550 mV (典型)

面板 产品上升和下降时间- 时钟:

系统焦虑- DSA8200、TDS/CSA8200和TDS/CSA8000B 与80A06 : RMS850 fs RMS (典型)TDS/CSA8000 与80A06 : RMS1.0 psRMS (典型)DSA8200 和TDS/CSA8200与80A06和82A04 : ≤200 fsRMS (由 82A04确定,为更多细节看见82A04数据表)。

极小的 输入敏感性- 200 mV

环境和 机械

重量公斤
维度毫米
0.40.6
高度25 1.0
宽度793.1
深度1355.3

环境状况- 参见主人仪器 规格。

电磁式- 参见主人仪器 规格。

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