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Achieving Fast Insight into PCIe® Receiver Performance Using the TMT4 Margin Tester


Traditional receiver equalization testing is performed using a calibrated oscilloscope and Bit Error Rate Tester (BERT)

setup to test the performance of the device under test’s (DUT) receiver (Rx). While the scope and BERT setup provides a very accurate and precise method of testing a receiver, there are

a few drawbacks to these systems, namely, calibration times, which can be several hours for a single test point, cost, and the expertise required to proficiently set up and run the tests. Tektronix has introduced a new tool to the PCIe testing toolkit, the TMT4 Margin Tester, which is intended to complement these scope and BERT systems by addressing the big pain points associated with scope and BERT testing.

  • Easy and simple setup – ready to test in under 10 minutes


  • Rapid Rx testing – x16 lane Rx results in 1 minute


  • Cost effective – compared to the cost of a scope and BERT system


Since the TMT4 Margin Tester’s Rx test is fundamentally different from the scope and BERT, the logical question is: “how do the results of TMT4 Margin Tester’s Rx test relate to traditional compliance system results?”. This application note discusses the TMT4 Margin Tester’s Rx test, highlights the differences between the test methodologies of TMT4 Margin Tester and compliance test setups, and reviews an experiment comparing the results of TMT4 Margin Tester’s Rx test to results from a compliance test.

Receiver Link Equalization Testing

The PCIe CEM standard is a high-speed serial computer expansion bus standard that is maintained and developed by the PCI Special Interest Group (PCI-SIG®). One of the primary goals of the PCIe standard is to enable interoperability between PCIe devices. The specification provides the test

list that all vendors designing add-in cards (AIC), or system boards must comply with. One of the primary tests, and arguably the most difficult to pass, is the Receiver Link Equalization (Rx LEQ) test.


The Rx LEQ test verifies that the system will correctly negotiate with its link partner to adjust the partner’s transmitter equalization appropriately and verifies that there is no more than one-bit error per 10E12 bits transmitted is

identified with a stressed signal. The test includes two primary parts: stressed eye calibration and the Rx LEQ test itself.


The PCIe Gen 4 stressed eye calibration is a 47-step process where an oscilloscope is used to dial in the BERT settings for amplitude, pre-shoot, de-emphasis, Random Jitter (RJ),

Sinusoidal Jitter (SJ), Insertion Loss, Differential Mode Noise (DMI), Common Mode Noise (CMI), Eye Width and Eye height. This can be a difficult task to perform manually for even an experienced operator and with automated test software

this process can still take several hours and is not always guaranteed to converge on a correctly stressed test signal.


Once the stressed eye calibration is complete, the AIC or system board can be connected to the BERT to perform the Rx LEQ test. The DUT and BERT will first undergo the auto-negotiation step, and the DUT will pick its preferred preset, or coefficients, for the BERT Tx. The BERT will transmit the calibrated stressed eye to the DUT Rx, and the DUT will transmit the received bits back to the BERT’s error

detector. As noted previously, in order to pass the DUT must not transmit more than one bit-error for every 10E12 bits transmitted.